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FG-600CL, a PXIe, open FPGA, Based CameraLink Frame Grabber:
FG-600CL is a PXIe format, FPGA based imaging solution that supports BASE, MEDIUM, FULL and Extended FULL CameraLink compatible cameras. The hardware is fully compliant with the PXIe standard and can be used in a PXIe chassis as well as in an embedded fashion. The PXIe700 based card , used in this solution, can be found on SDSP web site for full details. The board offers 4 lanes of Gen2 PCIe for host communication. An FMC-CL Cameralink FMC card is attached to the base card for interfacing to the cameras.

Interface Number of Cameras +(option) Base CL 2 (2) Medium CL 1 (1) Full CL 1 (1) Extended Full CL 1 (1) The FG-600CL has a variety of I/O capabilities – 2 x SATA connectors for real-time storage of image frames (needs suitable IP core which is not included) and an SFP+ for transfer of images via Ethernet connection. The x2 SATA can also be used as general purpose I/O.

FG-600CL base board (PXIe700) comes with a Kintex7 XC7K410T in FFG900 package and includes: •PXI control, trigger and clock •4 Lane PCIe Gen2 (Gen3 with softcore) •SFP+ cage for 10Gb Ethernet or Fiber Optics •JTAG •White Rabbit support for nanosecond synchronization •2 banks of DDR3 memory, 1GB each, 32-bit wide and 128MB of FLASH

With an open FPGA the hardware is fully user- programmable to implement customized IP cores.

The package comprises PXIe700 FPGA card, FMC-CL Cameralink interface FMC, CameraLink capture and set up IP cores, PCIe driver, demo application, host API library, and a full user guide. Demo includes set up of camera, capture of image and buffered in FPGA for transfer to host over PCIe interface.

Features •PoCL (Power over Camera Link) v1.2 support •x2 SATA interfaces for real-time image storage with suitable SATA core (not provided) or x1 SATA and x1SFP+ •7.14 Gbit/sec Camera Link Interface •7.48 Gbit/sec FMC Interface •Acquisition pixel clock rates up to 85MHz •ESD protection for all Camera Link signals

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