Other Questions

Question Asked:

Hi, my problem is to control on FPGA the acquisition of information through a Piranha Dalsa P22206k40 linescan by external trigger . Can you tell me the mapping data lines (X0, X1, X2, X3) in terms of pixels, because I found documents with conflicting information? My target is to control the acquisition occurring when the value of FVAL changes. I noticed that at times the pixel clock is regular and sometimes not, this indicates the availability of data? Best Regards, Maria