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Hi, my problem is to control on FPGA the acquisition of information through a Piranha Dalsa P22206k40 linescan by external trigger . Can you tell me the mapping data lines (X0, X1, X2, X3) in terms of pixels, because I found documents with conflicting information? My target is to control the acquisition occurring when the value of FVAL changes. I noticed that at times the pixel clock is regular and sometimes not, this indicates the availability of data? Best Regards, Maria

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Christine Fagone - Sales Administration Manager
Teledyne DALSA
christine [dot] fagone [at] teledynedalsa.com
(978) 670-2041

Hi Maria, I was wondering if you ever received an answer to your question. If not, please let me know (via email) and I will have the appropriate person follow up with you to resolve your issue. Thanks, Christine Fagone

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